Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding

[Article] Motion estimation and CABAC VLSI co-processors for real-time high-quality H.264/AVC video coding VLSI co-processors for real-time high-quality H.264/AVC video coding. Porto, the institutional repository of the Politecnico di Torino, is provided by the University Library and the IT-Services. The aim is to enable open access to all the world. Please share with us how this access benefits you. Your story matters. Summary Real-Time and high-quality video coding is gaining a wide interest in the research and industrial community for different applications. H.264/AVC, a recent standard for high performance video coding, can be successfully exploited in several scenarios including digital video broadcasting, high-definition TV and DVD-based systems, which require to sustain up to tens of Mbits/s. To that purpose this paper proposes optimized architectures for H.264/AVC most critical tasks, Motion Estimation and Context Adaptive Binary Arithmetic Coding. Post synthesis results on sub-micron CMOS standard-cells technologies show that the proposed architectures can actually process in real time 720×480 video sequences at 30 frames/s and grant more than 50 Mbits/s. The achieved circuit complexity and power consumption budgets are suitable for their integration in complex VLSI multimedia systems based either on AHB bus centric on-chip communication system or on novel Network-on-Chip (NoC) infrastructures for MPSoC (Multi Processor System on Chip).